Full Adder

Two half adders chained together with carry-in support.

Interactive Circuit
A
B
C_in
→
Sum
1
C_out
0
Circuit Diagram — Two Half Adders
A=0B=1Cin=0HA₁XOR+ANDs₁=1c₁=0HA₂XOR+ANDSum=1ORCout=0
Step-by-Step Equations
HA₁ SumA ⊕ B = 0 ⊕ 1= 1
HA₁ CarryA ∧ B = 0 ∧ 1= 0
HA₂ Sums₁ ⊕ Cin = 1 ⊕ 0= 1
HA₂ Carrys₁ ∧ Cin = 1 ∧ 0= 0
Coutc₁ ∨ c₂ = 0 ∨ 0= 0
0 + 1 + 0 = 01 (1 in decimal)
Truth Table
ABC_inSumC_out
00000
00110
01010
01101
10010
10101
11001
11111
About the Full Adder
The full adder extends the half adder by accepting a carry-in (Cin) input. It's built from two half adders and an OR gate: HA₁ adds A and B, then HA₂ adds that sum with the carry-in. The final carry-out is the OR of the two intermediate carries. This design allows full adders to be chained together for multi-bit addition.