Register Transfer Notation

Visualize microoperations and data movement inside the CPU using RTN expressions and datapath diagrams.

📖 Key Terms
Register TransferA microoperation that copies data from one register to another (e.g. R1 ← R2).
MicrooperationA single, atomic data-movement or arithmetic step executed in one clock cycle.
Control SignalA binary signal generated by the control unit to enable or disable a specific datapath operation.
ALUArithmetic Logic Unit — performs addition, subtraction, bitwise logic, and comparisons.
Data PathThe network of registers, buses, ALU, and multiplexers that carry and transform data inside the CPU.
Control PathThe circuitry (control unit + signals) that sequences and coordinates datapath operations.
System BusThe shared communication pathway connecting CPU, memory, and I/O — composed of address, data, and control buses.
MAR / MDRMemory Address Register holds the target address; Memory Data Register holds the data being read or written.
⚙️ What This Tool Does

The RTN Animator parses register transfer statements (like R1 ← R2 + R3 or IR ← M[MAR]) and animates the data flow on a CPU datapath diagram. Each step highlights which components are reading (blue) and writing (green), with arrows showing the exact data path taken.

🏛️ Role in Computer Architecture

RTN is the formal language hardware designers use to describe what happens inside a CPU during each clock cycle. It bridges the gap between high-level instructions and physical hardware — every ISA instruction decomposes into a sequence of RTN microoperations that the control unit must orchestrate. Understanding RTN is key to designing control units, pipelining stages, and debugging processor behavior.

RTN AnimatorInput RTN statements and watch data flow through the CPU datapath — registers, ALU, buses, and memory.