Instruction Set Architecture

Explore instruction formats, opcodes, addressing modes, and how software communicates with the CPU.

📖 Key Terms
OpcodeThe portion of an instruction that specifies the operation to perform (e.g. ADD, LOAD, JUMP).
OperandThe data value or address an instruction acts upon.
Instruction WordThe complete binary encoding of a single instruction, including opcode, registers, and operand fields.
Instruction FormatThe layout that defines how bits are divided among opcode, register, addressing mode, and operand fields.
Program Counter (PC)A register that holds the memory address of the next instruction to fetch.
Instruction Register (IR)A register that holds the instruction currently being decoded and executed.
GPRsGeneral Purpose Registers — a bank of fast storage locations inside the CPU available for arithmetic and data movement.
Addressing ModeThe method used to calculate the effective address of an operand (immediate, direct, indirect, register, indexed, etc.).
⚙️ What This Tool Does

The Instruction Builder lets you compose a machine-level instruction by selecting an opcode, destination register, addressing mode, and operand value. It instantly encodes the selection into a 32-bit instruction word, showing the binary and hex representations, a color-coded field diagram, the assembly mnemonic, and the step-by-step memory fetch sequence for the chosen addressing mode.

🏛️ Role in Computer Architecture

The ISA is the contract between hardware and software — it defines every instruction the CPU can understand. Compilers translate high-level code into ISA instructions, and hardware designers build datapaths to execute them. Understanding instruction formats, addressing modes, and encoding is essential for writing assembly, designing processors, and analyzing how programs interact with memory.

Instruction BuilderSelect opcode, addressing mode, and registers — see the binary encoding and memory fetch sequence.