Instruction Builder

Select an opcode, register, and addressing mode to see the 32-bit instruction encoding, memory fetch sequence, and effective address formula.

📖 Key Concepts

Opcode — tells the CPU what to do (add, load, jump). Register — selects where to store the result. Addressing Mode — determines how the operand is located (literal value, memory address, pointer, register, or indexed offset). Operand — the raw value or address embedded in the instruction.

💡 How to Use

1. Choose an opcode from the dropdown (e.g. ADD, LOAD, JMP).  2. Pick a destination register (R0–R15).  3. Select an addressing mode to control how the operand is interpreted.  4. Enter an operand value (0–524 287).  The right panel updates instantly with the 32-bit binary layout, hex encoding, assembly syntax, effective address formula, and the memory fetch sequence the CPU would follow.

Operand value is embedded directly in the instruction.
32-Bit Instruction Word
Opcode0000016 bits
Register00004 bits
Addr Mode0003 bits
Operand000000000000000000019 bits
Encoded Instruction
Binary00000100000000000000000000000000
Hex0x04000000
AssemblyADD R0, #0
Effective AddressOperand = value in instruction
Memory Fetch Sequence
  1. 1Fetch instruction from M[PC]
  2. 2Decode opcode and extract operand field
  3. 3Use operand field directly as the data value